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53812 MNR4G T34HF 1N5401G 10915612 AO3400 MP152206 PRODUCTS
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  AO3421 30v p-channel mosfet general description product summary v ds i d (at v gs =-10v) -2.6a r ds(on) (at v gs =-10v) < 110m w r ds(on) (at v gs =-4.5v) < 180m w symbol v ds v gs i dm t j , t stg symbol t 10s steady-state steady-state r q jl 70 100 90 c thermal characteristics units parameter typ max junction and storage temperature range the AO3421 uses advanced trench technology to provi de excellent r ds(on) and low gate charge. this device is suitable for use as a load switch or in pwm applica tions. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted -30v drain-source voltage -30 t a =70c 20 gate-source voltage t a =70c i d -55 to 150 -2.6 -2.2 -20 1 v power dissipation b p d pulsed drain current c continuous drain current t a =25c w 1.4 t a =25c a maximum junction-to-ambient a maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 63 125 80 c/w r q ja sot23 top view bottom view d g s g s d g ds rev 4: may 2011 www.aosmd.com page 1 of 5
AO3421 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 100 na v gs(th) gate threshold voltage -1.4 -1.9 -2.4 v i d(on) -20 a 77 110 t j =125c 100 140 125 180 m w g fs 5 s v sd -0.8 -1 v i s -1.5 a c iss 197 240 pf c oss 42 pf c rss 26 37 pf r g 3.5 7.2 11.0 w q g (10v) 4.3 5.2 nc q g (4.5v) 2.2 3 nc q gs 0.7 nc q gd 1.1 nc t d(on) 7.5 ns t r 4.1 ns t d(off) 11.8 ns t f 3.8 ns t rr 11.3 14 ns q rr 4.4 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =-2.6a, di/dt=100a/ m s turn-on rise time turn-off delaytime turn-off fall time turn-on delaytime dynamic parameters total gate charge v gs =-10v, v ds =-15v, i d =-2.6a gate source charge gate drain charge v gs =-10v, v ds =-15v, r l =5.8 w , r gen =3 w total gate charge gate resistance v gs =0v, v ds =0v, f=1mhz v gs =-10v, i d =-2.6a reverse transfer capacitance i s =-1a,v gs =0v v ds =-5v, i d =-2.6a v gs =-4.5v, i d =-2a maximum body-diode continuous current input capacitance output capacitance electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current v ds =v gs i d =-250 m a r ds(on) static drain-source on-resistance diode forward voltage i f =-2.6a, di/dt=100a/ m s v gs =0v, v ds =-15v, f=1mhz switching parameters body diode reverse recovery time m w forward transconductance a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initialt j =25c. d. the r q ja is the sum of the thermal impedence from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150c. the soa curve provides a single pulse ratin g. rev 4: may 2011 www.aosmd.com page 2 of 5
AO3421 typical electrical and thermal characteristics 17 52 10 0 18 40 0 2 4 6 8 10 0 1 2 3 4 5 6 -v gs (volts) figure 2: transfer characteristics (note e) -i d (a) 40 60 80 100 120 140 160 180 200 0 2 4 6 8 10 -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -v sd (volts) figure 6: body-diode characteristics (note e) -i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =-4.5v i d =-2a v gs =-10v i d =-2.6a 60 100 140 180 220 260 300 2 4 6 8 10 -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v i d =-2.6a 25c 125c 0 3 6 9 12 15 0 1 2 3 4 5 -v ds (volts) fig 1: on-region characteristics (note e) -i d (a) v gs =-3.5v -4v -10v -5v -6v -4.5v -8v rev 4: may 2011 www.aosmd.com page 3 of 5
AO3421 typical electrical and thermal characteristics 0 2 4 6 8 10 0 1 2 3 4 5 q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 50 100 150 200 250 300 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss c oss c rss v ds =-15v i d =-2.6a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) power (w) t a =25c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s 1s 1ms dc r ds(on) limited t j(max) =150c t a =25c 100 m s 10s 10ms 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =125c/w 100ms t on t p d rev 4: may 2011 www.aosmd.com page 4 of 5
AO3421 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) rev 4: may 2011 www.aosmd.com page 5 of 5


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